Chip Gallery

2023

IIR-DRNN

TSMC 65nm CMOS
Role: Designer (Full-Custom SRAM)

arXiv 2024

Tape-out: Mar. 2023
Fab-out: Aug. 2023

2020

CochClass

TSMC 65nm CMOS
Role: Top Architect

ISSCC 2022 JSSC 2022

Tape-out: Dec. 2020
Fab-out: May. 2021

2019

BioZ2

Samsung 65nm CMOS
Role: Top Architect

VLSI 2020 JSSC 2022

📚 MATLAB/Verilog in PhD Thesis

Tape-out: May. 2019
Fab-out: Dec. 2019

2018

GLY

Samsung 65nm CMOS
Role: Top Architect

ISSCC 2019 JSSC 2020

Tape-out: Jan. 2018
Fab-out: Aug. 2018

2017

IOT

TSMC 180nm HV CMOS
Role: Designer (Boost Converter)

ISSCC 2019

Tape-out: Dec. 2017
Fab-out: Mar. 2018

2016

TOF TEST

SMIC 180nm CMOS
Role: Top Architect

ESSCIRC 2017

Tape-out: Jun. 2016
Fab-out: Aug. 2016

WIT

Samsung 65nm CMOS
Role: Layout Engineer (SAR ADC)

ISSCC 2016 JSSC 2017

Tape-out: Feb. 2016
Fab-out: Aug. 2016

ANES

Samsung 65nm CMOS
Role: Layout Engineer (SAR ADC)

ISSCC 2016

Tape-out: Feb. 2016
Fab-out: Aug. 2016